# machine cycle for an instruction

Discussion in 'Assembly Language Programming (ALP) Forum' started by swaeded, May 8, 2007.

1. ### swaededNew Member

Joined:
Apr 26, 2007
Messages:
9
0
Trophy Points:
0
Hi,

In 8085 instruction,
1 byte instruction takes 1 machine cycle and 4 t-states.
2 byte instruction takes 2 machine cycle and 4+3 t-states.
3 byte instruction takes 4 machine cycle and 4+3+3+3 t-states.

then y out and in instruction which is a 2-byte instruction takes 3- machine cycles....

2. ### DaWeiNew Member

Joined:
Dec 6, 2006
Messages:
835
5
Trophy Points:
0
Occupation:
Semi-retired EE
Location:
Texan now in Central NY
http://www.daweidesigns.com
I can only suggest that you review the logic schematic of the 8085, bearing in mind setup and hold times and prop delays.

3. ### vishant103New Member

Joined:
Apr 6, 2010
Messages:
1
0
Trophy Points:
0
Occupation:
student
Location:
gandhinagar
http://vishantprajapati.110mb.com/
hello sir can u help me how to count machine cycle?

4. ### xpi0t0sMentor

Joined:
Aug 6, 2004
Messages:
3,009
203
Trophy Points:
63
Occupation:
Senior Support Engineer
Location:
England
Because your initial assumptions are wrong:
This may be the *general* rule but it doesn't apply to all instructions. A quick google found http://www.google.co.uk/url?sa=t&so..._OSwCA&usg=AFQjCNHOmwV0pomUKU8SI5LB2jCA_ZLjXQ

haha, nasty URL, and it's a PDF, but it lists ADC M as 1 byte and 2 M-cycles (1/2), CALL 3/5, CC is 3/2 if the transfer is not taken but 3/5 if it is, and so on. So it is clear that not all instructions follow your 1/1; 2/2; 3/4 assumption.

So read the documentation in detail and do not assume any generalisation holds for *all* possibilities; this is rarely the case.