Can anyone correct me with this question
Consider a virtual memory system with the following parameters:
32-bit virtual address
8-kbyte virtual page size => 212
linear page table
32-bit Page Table Entry PTE
a. Draw a diagram of the 32-bit address showing the length and placement of all bit fields.
Page number is 20 bit and Offset is 12 bits
How many virtual pages are available in this system?
my answer is
= 32-12 = 20
Assuming that 16 bits in the page table entry (PTE) is used for flags,
what is the maximum size of the physical memory (in bytes) this system can support?
= 16+12= 28
b. Describe the steps in translating the following virtual address: 0x 004E C01A. You have to base this description on specific values extracted from the given address. If you make any assumptions, you have to state them explicitly.
my answer was in this image but i am not so sure