store page table entries of the current process. The OS also uses a translation-lookaside buffer (TLB) to cache page table entries. You are also given the following information:
a) size of a page table entry is 4 bytes,
b) TLB hit ratio is 90%,
c) time for a TLB lookup is negligible,
d) time for a memory read is 100 nanoseconds,
e) time to a read a page from the swapping device into physical memory is 10 milliseconds.
Calculate the effective memory access time for a process whose address space is 20 MB? Assume that memory accesses are random and distributed uniformly over the entire address space.
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