Running whatever code the processor generates addresses built up by compiling and linking of a program.
These addresses are not real free address in the current physical RAM.
Therefore we must place the actual code to a free physical RAM location first.
Unfortunately the free address is not the same generated by the code.
We need translation from virtual to physical. We need information to tell where the real address is.
This is a page table.

How to use it? It would be too slow to seek a memory page table for every access.
Therefore we have inside the processor translation cache (TLB, can be for ex. 96 entries only).
A TLB entry provides fast translation. It translates immediately, virtual to physical (for a page, a big block, offset comes from the end of the virtual address). So every access for a big block (for ex. 32 kb) is very fast
when translation is once built up. If we have not a translation already built up inside the processor, we get a TLB-fault.
TLB fault handler builds up the translation and the instruction is restarted.
TLB- fault handler uses page tabe information. If the page is already somewhere in the RAM by the table, making a translation is easy. If not, a page table entry must be created an the code read from the disk to a new free location.

My simplified pseudo code from my previous post material (_EB75_):

if( the faulting virtual address is ok)
if{ a page table entry already exists for this page)
Build up a new TLB-entry; (we have not enough entries for the whole RAM)
Return to the task from the interruption;
else {
Find a new free RAM area;
Read the page from disc to this area;
Build up a new page table entry (and mark as present);
Build up a new virtual to physical TLB- translation cache entry;
Return to the task from the interruption;
else ............

This simplified pseudo code do not handle everything for ex. we have not any free RAM and we must

My earlier post:”A very compact basics tutorial tool to learn kernel - any use?” was intended to ansver this kind of questions by simple code level examples and pseudo codes.
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