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Need help understanding Assembly time delay

Discussion in 'Meet and Greet' started by larissalle, Apr 4, 2010.

  1. larissalle

    larissalle New Member

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    Hi, 1) below is an assembly question with the answers in red. I am trying to find out where the numbers 3, 4, 16/4, and 16 came from. I understand they are from intel for the IA32 chipset. But I can't find any table that shows where to get these numbers. Anyone know?
    2) Is the CLKS formula in the answers something standard? How do I know to use 4, 28, 16 and 16 in the formula? I have 15 assembly books that do not have this in it, and I can't find anything on the internet.

    Help is appreciated

    Thx, larissalle

    Problem: For the following software time delay routine:

    .data
    Time1 WORD 3000h

    .code CLKS
    Delay1 PROC
    mov dx, Time1 4
    dly1:
    dec dx 3
    nop 3
    nop 3
    nop 3
    jnz dly1 16/4
    ret 16
    Delay1 ENDP

    ... Perform the following operations:
    (1) Write the # CLKS equation.
    (2) For a clock frequency = 10 MHz, calculate the time delay for the entire PROC at the given DX value.
    (3) What values of DX would provide the minimum and maximum time delays, and what times would they correspond to at the 10 MHz frequency?

    Answers:
    (1) # CLKS = 4 + 28(DX-1) + 16 + 16
    = 28(DX-1) + 36 = 28DX + 8

    (2) TE = 100ns * [28(12288) + 8]
    = 100ns * [344072] = 34.4 milliseconds

    (3) For minimum time, DX = 1 corresponding to one pass through the instructions without any loops.
    TE = 100ns * [36] = 3.6 microseconds

    For maximum time, DX = 0 which corresponds to a count of 65, 536.
    TE = 100ns * [28(65,536) + 8] = 183.5 milliseconds
     

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